Design Overview for top_slave_fifo

PropertyValue
Project Name:e:\3s400_slavefifo
Target Device:xc3s400
Report Generated:Tuesday 02/03/09 at 16:49
Printable Summary (View as HTML)top_slave_fifo_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops:787,1681% 
Number of 4 input LUTs:1997,1682% 
Logic Distribution:    
Number of occupied Slices:1223,5843% 
Number of Slices containing only related logic:122122100% 
Number of Slices containing unrelated logic:01220% 
Total Number 4 input LUTs:2337,1683% 
Number used as logic:199   
Number used as a route-thru:34   
Number of bonded IOBs:5714140% 
Number of GCLKs:2825% 
Number of DCMs:1425% 

Performance Summary

PropertyValue
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
No Constraints Found   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentSunday 12/02/07 at 07:09
Translation ReportCurrentSunday 12/02/07 at 07:09
Map ReportCurrentSunday 12/02/07 at 07:09
Pad ReportCurrentSunday 12/02/07 at 07:09
Place and Route ReportCurrentSunday 12/02/07 at 07:09
Post Place and Route Static Timing ReportCurrentSunday 12/02/07 at 07:10
Bitgen ReportCurrentTuesday 02/03/09 at 16:49