Design Overview for fre

PropertyValue
Project Name:d:\try\3s400changed\s2_fre\project
Target Device:xc3s400
Report Generated:Wednesday 10/11/06 at 10:13
Printable Summary (View as HTML)fre_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops:277,1681% 
Number of 4 input LUTs:17,1681% 
Logic Distribution:    
Number of occupied Slices:143,5841% 
Number of Slices containing only related logic:1414100% 
Number of Slices containing unrelated logic:0140% 
Total Number 4 input LUTs:277,1681% 
Number used as logic:1   
Number used as a route-thru:26   
Number of bonded IOBs:101417% 
Number of GCLKs:1812% 

Performance Summary

PropertyValue
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
No Constraints Found   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentWednesday 10/11/06 at 10:13
Translation ReportCurrentWednesday 10/11/06 at 10:13
Map ReportCurrentWednesday 10/11/06 at 10:13
Pad ReportCurrentWednesday 10/11/06 at 10:13
Place and Route ReportCurrentWednesday 10/11/06 at 10:13
Post Place and Route Static Timing ReportCurrentWednesday 10/11/06 at 10:13
Bitgen ReportCurrentWednesday 10/11/06 at 10:13