Property | Value |
Project Name: | d:\xilinx\myproject\xilinxsamples_v2.0\3s400changed\part_one\s6_unjounce\project |
Target Device: | xc3s400 |
Report Generated: | Tuesday 10/09/07 at 11:03 |
Printable Summary (View as HTML) | top_summary.html |
Logic Utilization | Used | Available | Utilization | Note(s) |
Number of Slice Flip Flops: | 37 | 7,168 | 1% | |
Number of 4 input LUTs: | 21 | 7,168 | 1% | |
Logic Distribution: | ||||
Number of occupied Slices: | 23 | 3,584 | 1% | |
Number of Slices containing only related logic: | 23 | 23 | 100% | |
Number of Slices containing unrelated logic: | 0 | 23 | 0% | |
Total Number 4 input LUTs: | 43 | 7,168 | 1% | |
Number used as logic: | 21 | |||
Number used as a route-thru: | 22 | |||
Number of bonded IOBs: | 15 | 141 | 10% | |
Number of GCLKs: | 1 | 8 | 12% |
Property | Value |
Number of Unrouted Signals: | All signals are completely routed. |
Number of Failing Constraints: | 0 |
Constraint(s) | Requested | Actual | Logic Levels |
No Constraints Found |
Report Name | Status | Last Date Modified |
Synthesis Report | Current | Tuesday 10/09/07 at 11:02 |
Translation Report | Current | Tuesday 10/09/07 at 11:02 |
Map Report | Current | Tuesday 10/09/07 at 11:02 |
Pad Report | Current | Tuesday 10/09/07 at 11:02 |
Place and Route Report | Current | Tuesday 10/09/07 at 11:02 |
Post Place and Route Static Timing Report | Current | Tuesday 10/09/07 at 11:02 |
Bitgen Report | Current | Tuesday 10/09/07 at 11:03 |