Design Overview for vga_pong_top

PropertyValue
Project Name:d:\try\3s400changed\part_two\s9_vga\part2\project
Target Device:xc3s400
Report Generated:Wednesday 10/11/06 at 23:48
Printable Summary (View as HTML)vga_pong_top_summary.html

Device Utilization Summary

Logic UtilizationUsedAvailableUtilizationNote(s)
Total Number Slice Registers:1917,1682% 
Number used as Flip Flops:187   
Number used as Latches:4   
Number of 4 input LUTs:5997,1688% 
Logic Distribution:    
Number of occupied Slices:4063,58411% 
Number of Slices containing only related logic:406406100% 
Number of Slices containing unrelated logic:04060% 
Total Number 4 input LUTs:7387,16810% 
Number used as logic:599   
Number used as a route-thru:139   
Number of bonded IOBs:1614111% 
Number of GCLKs:1812% 

Performance Summary

PropertyValue
Number of Unrouted Signals:All signals are completely routed.
Number of Failing Constraints:0

Failing Constraints

Constraint(s)RequestedActualLogic Levels
No Constraints Found   

Detailed Reports

Report NameStatusLast Date Modified
Synthesis ReportCurrentThursday 04/27/06 at 09:29
Translation ReportCurrentThursday 04/27/06 at 09:29
Map ReportCurrentWednesday 10/11/06 at 23:48
Pad ReportCurrentWednesday 10/11/06 at 23:48
Place and Route ReportCurrentWednesday 10/11/06 at 23:48
Post Place and Route Static Timing ReportCurrentWednesday 10/11/06 at 23:48
Bitgen ReportCurrentWednesday 10/11/06 at 23:48