/**
  @page RCC_Example RCC Configuration example
  
  @verbatim
  ******************** (C) COPYRIGHT 2012 STMicroelectronics *******************
  * @file    RCC/RCC_Example/readme.txt 
  * @author  MCD Application Team
  * @version V1.0.0
  * @date    18-May-2012
  * @brief   Description of the RCC Configuration example
  ******************************************************************************
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  *        http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
   @endverbatim

@par Example Description 

This example shows how to:
  - Configure the PLL (clocked by HSE) as System clock source
  - Use the Clock Security System (CSS) feature to detect HSE failure
  - Output the System clock on MCO pin

For debug purposes, the RCC_GetClocksFreq() function is used to retrieve the current
status and frequencies of different on-chip clocks.
You can see the RCC_ClockFreq structure content, which holds the frequencies of different
on-chip clocks, using your toolchain debugger.

This example also handles the High Speed External clock (HSE) failure detection
(known as Clock Security System, CSS): when the HSE clock disappears (broken or 
disconnected external Quartz), HSE and PLL are disabled (but no change to PLL 
configuration), HSI is selected as a system clock source and an interrupt (NMI) 
is generated. 
In the NMI ISR, the HSE and HSE ready interrupt are enabled. Once the HSE clock 
recovers, the HSERDY interrupt is generated and, in the RCC ISR routine, the system
clock is reconfigured to its previous state (before HSE clock failure). 
You can monitor the system clock on MCO pin (PA.8).
Two LEDs are toggled with a timing defined by the Delay function.

@note On the STM320518-EVAL board, to generate the HSE failure you can remove
      the HSE quartz from the socket.


@par Directory contents 
  - RCC/RCC_Example/stm32f0xx_conf.h     Library Configuration file
  - RCC/RCC_Example/stm32f0xx_it.c       Interrupt handlers
  - RCC/RCC_Example/stm32f0xx_it.h       Interrupt handlers header file
  - RCC/RCC_Example/main.c               Main program  
  - RCC/RCC_Example/main.h               Header file for Main program
  - RCC/RCC_Example/system_stm32f0xx.c   STM32F0xx system source file

@note The "system_stm32f0xx.c" is generated by an automatic clock configuration 
      tool and can be easily customized to meet user application requirements. 
      To select different clock setup, use the "STM32F0xx_Clock_Configuration_VX.Y.Z.xls" 
      provided with the AN4055 package available on <a href="http://www.st.com/internet/mcu/class/1734.jsp">  ST Microcontrollers </a>

      
@par Hardware and Software environment

  - This example runs on STM32F0xx Devices.
  
  - This example has been tested with STMicroelectronics STM320518-EVAL (STM32F0xx)
    evaluation board and can be easily tailored to any other supported device 
    and development board.

  - STM320518-EVAL set-up
     - To generate the HSE failure you can remove the HSE quartz from the socket.


@par How to use it ? 

In order to make the program work, you must do the following :
 - Copy all source files from this example folder to the template folder under
   Project\STM32F0xx_StdPeriph_Templates
 - Open your preferred toolchain 
 - Rebuild all files and load your image into target memory
 - Run the example
        
 * <h3><center>&copy; COPYRIGHT STMicroelectronics</center></h3>
 */
