/**
  @page Time_Base TIM Time Base Description
  
  @verbatim
  ******************** (C) COPYRIGHT 2012 STMicroelectronics *******************
  * @file    TIM/Time_Base/readme.txt 
  * @author  MCD Application Team
  * @version V1.0.0
  * @date    18-May-2012
  * @brief   Description of Time Base Example.
  ******************************************************************************
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  *        http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
   @endverbatim

@par Example Description 

This example shows how to configure the TIM peripheral in Output Compare Timing 
mode with the corresponding Interrupt requests for each channel in order to generate
4 different time bases.

The TIM3CLK frequency is set to SystemCoreClock (Hz), to get TIM3 counter 
clock at 6 MHz so the Prescaler is computed as following:
   - Prescaler = (TIM3CLK / TIM3 counter clock) - 1

SystemCoreClock is set to 48MHz.

The TIM3 CC1 register value is equal to 40961, 
CC1 update rate = TIM3 counter clock / CCR1_Val = 146.48 Hz,
so the TIM3 Channel 1 generates an interrupt each 6.8ms

The TIM3 CC2 register is equal to 27309, 
CC2 update rate = TIM3 counter clock / CCR2_Val = 219.7 Hz
so the TIM3 Channel 2 generates an interrupt each 4.55ms

The TIM3 CC3 register is equal to 13654, 
CC3 update rate = TIM3 counter clock / CCR3_Val = 439.4Hz
so the TIM3 Channel 3 generates an interrupt each 2.27ms

The TIM3 CC4 register is equal to 6826, 
CC4 update rate = TIM3 counter clock / CCR4_Val =  878.9 Hz
so the TIM3 Channel 4 generates an interrupt each 1.13ms.

When the counter value reaches the Output compare registers values, the Output 
Compare interrupts are generated and, in the handler routine, 4 leds (LED1, LED2, 
LED3 and LED4) are toggled with the following frequencies: 

- LED1: 73.24Hz (CC1)
- LED2: 109.8Hz (CC2)
- LED3: 219.7Hz (CC3) 
- LED4: 439.4Hz (CC4)
 

@par Directory contents 

  - TIM/Time_Base/stm32f0xx_conf.h    Library Configuration file
  - TIM/Time_Base/stm32f0xx_it.c      Interrupt handlers
  - TIM/Time_Base/stm32f0xx_it.h      Interrupt handlers header file
  - TIM/Time_Base/main.c              Main program
  - TIM/Time_Base/system_stm32f0xx.c  STM32F0xx system source file
  
@note The "system_stm32f0xx.c" is generated by an automatic clock configuration 
      tool and can be easily customized to meet user application requirements. 
      To select different clock setup, use the "STM32F0xx_Clock_Configuration_VX.Y.Z.xls" 
      provided with the AN4055 package available on <a href="http://www.st.com/internet/mcu/class/1734.jsp">  ST Microcontrollers </a>

         
@par Hardware and Software environment

  - This example runs on STM32F0xx Devices.
  
  - This example has been tested with STMicroelectronics STM320518-EVAL (STM32F0xx)
    evaluation board and can be easily tailored to any other supported device 
    and development board.

  - STM320518-EVAL Set-up
    -  Use LED1, LED2, LED3 and LED4 connected respectively to PC.10, PC.11, PC.12
      and PD.02 pins and connect them on an oscilloscope to show the different 
      Time Base signals.


@par How to use it ? 

In order to make the program work, you must do the following :
 - Copy all source files from this example folder to the template folder under
   Project\STM32F0xx_StdPeriph_Templates
 - Open your preferred toolchain 
 - Rebuild all files and load your image into target memory
 - Run the example

 * <h3><center>&copy; COPYRIGHT STMicroelectronics</center></h3>
 */
