; generated by ARM C/C++ Compiler, RVCT4.0 [Build 728]
; commandline ArmCC [--debug -c --asm --interleave -o..\OBJ\stm32f10x_it.o --depend=..\OBJ\stm32f10x_it.d --cpu=Cortex-M3 --apcs=interwork -O0 -I..\..\Libraries\STM32F10x_StdPeriph_Driver\inc -I..\..\Libraries\CMSIS\CM3\CoreSupport -I..\..\Libraries\CMSIS\CM3\DeviceSupport\ST\STM32F10x -I..\..\USER\INC -IC:\Keil\ARM\INC -IC:\Keil\ARM\INC\ST\STM32F10x -D__MICROLIB -DUSE_STDPERIPH_DRIVER -DSTM32F10X_HD --omf_browse=..\OBJ\stm32f10x_it.crf ..\..\USER\SRC\stm32f10x_it.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  NMI_Handler PROC
;;;45     *******************************************************************************/
;;;46     void NMI_Handler(void)
000000  4770              BX       lr
;;;47     {
;;;48     }
;;;49     
                          ENDP

                  HardFault_Handler PROC
;;;56     *******************************************************************************/
;;;57     void HardFault_Handler(void)
000002  bf00              NOP      
                  |L1.4|
;;;58     {
;;;59       /* Go to infinite loop when Hard Fault exception occurs */
;;;60       while (1)
000004  e7fe              B        |L1.4|
;;;61       {
;;;62       }
;;;63     }
;;;64     
                          ENDP

                  MemManage_Handler PROC
;;;71     *******************************************************************************/
;;;72     void MemManage_Handler(void)
000006  bf00              NOP      
                  |L1.8|
;;;73     {
;;;74       /* Go to infinite loop when Memory Manage exception occurs */
;;;75       while (1)
000008  e7fe              B        |L1.8|
;;;76       {
;;;77       }
;;;78     }
;;;79     
                          ENDP

                  BusFault_Handler PROC
;;;86     *******************************************************************************/
;;;87     void BusFault_Handler(void)
00000a  bf00              NOP      
                  |L1.12|
;;;88     {
;;;89       /* Go to infinite loop when Bus Fault exception occurs */
;;;90       while (1)
00000c  e7fe              B        |L1.12|
;;;91       {
;;;92       }
;;;93     }
;;;94     
                          ENDP

                  UsageFault_Handler PROC
;;;101    *******************************************************************************/
;;;102    void UsageFault_Handler(void)
00000e  bf00              NOP      
                  |L1.16|
;;;103    {
;;;104      /* Go to infinite loop when Usage Fault exception occurs */
;;;105      while (1)
000010  e7fe              B        |L1.16|
;;;106      {
;;;107      }
;;;108    }
;;;109    
                          ENDP

                  SVC_Handler PROC
;;;116    *******************************************************************************/
;;;117    void SVC_Handler(void)
000012  4770              BX       lr
;;;118    {
;;;119    }
;;;120    
                          ENDP

                  DebugMon_Handler PROC
;;;127    *******************************************************************************/
;;;128    void DebugMon_Handler(void)
000014  4770              BX       lr
;;;129    {
;;;130    }
;;;131    
                          ENDP

                  PendSV_Handler PROC
;;;138    *******************************************************************************/
;;;139    void PendSV_Handler(void)
000016  4770              BX       lr
;;;140    {
;;;141    }
;;;142    
                          ENDP

                  SysTick_Handler PROC
;;;149    *******************************************************************************/
;;;150    void SysTick_Handler(void)
000018  4770              BX       lr
;;;151    {
;;;152    }
;;;153    
                          ENDP

                  USB_HP_CAN1_TX_IRQHandler PROC
;;;166    *******************************************************************************/
;;;167    void USB_HP_CAN1_TX_IRQHandler(void)
00001a  4770              BX       lr
;;;168    {
;;;169      //CTR_HP();
;;;170    }
;;;171    
                          ENDP

                  USB_LP_CAN1_RX0_IRQHandler PROC
;;;179    *******************************************************************************/
;;;180    void USB_LP_CAN1_RX0_IRQHandler(void)
00001c  4770              BX       lr
;;;181    {
;;;182      //USB_Istr();
;;;183    }
;;;184    #endif /* STM32F10X_CL */
                          ENDP

                  SDIO_IRQHandler PROC
;;;194    *******************************************************************************/
;;;195    void SDIO_IRQHandler(void)
00001e  4770              BX       lr
;;;196    { 
;;;197      /* Process All SDIO Interrupt Sources */
;;;198      //SD_ProcessIRQSrc();
;;;199      
;;;200    }
;;;201    #endif /* STM32F10X_HD | STM32F10X_XL*/
                          ENDP

                  USART1_IRQHandler PROC
;;;224    
;;;225    void USART_COM1_IRQHandler(void)
000020  b510              PUSH     {r4,lr}
;;;226    {
;;;227    	USART1_RxIntHandler();
000022  f7fffffe          BL       USART1_RxIntHandler
;;;228    }
000026  bd10              POP      {r4,pc}
;;;229    
                          ENDP

                  USART2_IRQHandler PROC
;;;230    void USART_COM2_IRQHandler(void)
000028  b510              PUSH     {r4,lr}
;;;231    {
;;;232      	USART2_RxIntHandler();
00002a  f7fffffe          BL       USART2_RxIntHandler
;;;233    }
00002e  bd10              POP      {r4,pc}
;;;234    
                          ENDP

                  EXTI4_IRQHandler PROC
;;;235    void EXTI4_IRQHandler(void)
000030  b510              PUSH     {r4,lr}
;;;236    { 
;;;237    	EXTI_ClearITPendingBit(EXTI_Line4);  		//EXTI4·λ     //жϱ־λ
000032  2010              MOVS     r0,#0x10
000034  f7fffffe          BL       EXTI_ClearITPendingBit
;;;238    	Vsync_Flag++;
000038  486f              LDR      r0,|L1.504|
00003a  7800              LDRB     r0,[r0,#0]  ; Vsync_Flag
00003c  1c40              ADDS     r0,r0,#1
00003e  496e              LDR      r1,|L1.504|
000040  7008              STRB     r0,[r1,#0]
;;;239    	if(Vsync_Flag==1)    //FIFOдָ븴λ
000042  4608              MOV      r0,r1
000044  7800              LDRB     r0,[r0,#0]  ; Vsync_Flag
000046  2801              CMP      r0,#1
000048  d118              BNE      |L1.124|
;;;240    	{
;;;241    	    FIFO_WRST=1;
00004a  496c              LDR      r1,|L1.508|
00004c  6008              STR      r0,[r1,#0]
;;;242    		FIFO_WRST=0;
00004e  f04f0000          MOV      r0,#0
000052  496b              LDR      r1,|L1.512|
000054  f8c10194          STR      r0,[r1,#0x194]
;;;243     		for(i=0;i<100;i++);
000058  496a              LDR      r1,|L1.516|
00005a  8008              STRH     r0,[r1,#0]
00005c  e004              B        |L1.104|
                  |L1.94|
00005e  4869              LDR      r0,|L1.516|
000060  8800              LDRH     r0,[r0,#0]  ; i
000062  1c40              ADDS     r0,r0,#1
000064  4967              LDR      r1,|L1.516|
000066  8008              STRH     r0,[r1,#0]
                  |L1.104|
000068  4866              LDR      r0,|L1.516|
00006a  8800              LDRH     r0,[r0,#0]  ; i
00006c  2864              CMP      r0,#0x64
00006e  dbf6              BLT      |L1.94|
;;;244    		FIFO_WRST=1;      
000070  2001              MOVS     r0,#1
000072  4962              LDR      r1,|L1.508|
000074  6008              STR      r0,[r1,#0]
;;;245    		FIFO_WR=1;	   //CMOSдFIFO
000076  4962              LDR      r1,|L1.512|
000078  f8c10184          STR      r0,[r1,#0x184]
                  |L1.124|
;;;246    		
;;;247    	}
;;;248    	if(Vsync_Flag==2)
00007c  485e              LDR      r0,|L1.504|
00007e  7800              LDRB     r0,[r0,#0]  ; Vsync_Flag
000080  2802              CMP      r0,#2
000082  d17d              BNE      |L1.384|
;;;249    	{
;;;250    	 	FIFO_WR=0;     //ֹCMOSдFIFO
000084  2000              MOVS     r0,#0
000086  4960              LDR      r1,|L1.520|
000088  6008              STR      r0,[r1,#0]
;;;251    		EXTI->IMR&=~(1<<4);	 //ֹⲿжϣ׼FIFOȡ
00008a  4860              LDR      r0,|L1.524|
00008c  f8d00400          LDR      r0,[r0,#0x400]
000090  f0200010          BIC      r0,r0,#0x10
000094  495d              LDR      r1,|L1.524|
000096  f8c10400          STR      r0,[r1,#0x400]
;;;252    		EXTI->EMR&=~(1<<4);
00009a  4608              MOV      r0,r1
00009c  f8d00404          LDR      r0,[r0,#0x404]
0000a0  f0200010          BIC      r0,r0,#0x10
0000a4  495a              LDR      r1,|L1.528|
0000a6  6008              STR      r0,[r1,#0]
;;;253    
;;;254    		FIFO_RRST=0;  //FIFOָ븴λ 
0000a8  f04f0000          MOV      r0,#0
0000ac  4959              LDR      r1,|L1.532|
0000ae  6008              STR      r0,[r1,#0]
;;;255    		FIFO_RCK=0;                
0000b0  4959              LDR      r1,|L1.536|
0000b2  6008              STR      r0,[r1,#0]
;;;256    		FIFO_RCK=1;	
0000b4  f04f0001          MOV      r0,#1
0000b8  6008              STR      r0,[r1,#0]
;;;257    		FIFO_RCK=0;
0000ba  f04f0000          MOV      r0,#0
0000be  6008              STR      r0,[r1,#0]
;;;258    		FIFO_RCK=1;
0000c0  f04f0001          MOV      r0,#1
0000c4  6008              STR      r0,[r1,#0]
;;;259    	  	FIFO_RRST=1;
0000c6  4953              LDR      r1,|L1.532|
0000c8  6008              STR      r0,[r1,#0]
;;;260    
;;;261    		VC245_FIFO=1;	 //MCUTFT
0000ca  4954              LDR      r1,|L1.540|
0000cc  6008              STR      r0,[r1,#0]
;;;262    		VC245_7670=1;
0000ce  4954              LDR      r1,|L1.544|
0000d0  6008              STR      r0,[r1,#0]
;;;263    		WriteControl=1;	 
0000d2  4954              LDR      r1,|L1.548|
0000d4  6008              STR      r0,[r1,#0]
;;;264    		LCD_CS=0; 
0000d6  f04f0000          MOV      r0,#0
0000da  4953              LDR      r1,|L1.552|
0000dc  6008              STR      r0,[r1,#0]
;;;265    		LCD_WriteReg(0x0003,0x1018);//TFTͬ
0000de  f2410118          MOV      r1,#0x1018
0000e2  f04f0003          MOV      r0,#3
0000e6  f7fffffe          BL       LCD_WriteReg
;;;266    		LCD_WriteReg(0x0050,0x0000); 
0000ea  2100              MOVS     r1,#0
0000ec  2050              MOVS     r0,#0x50
0000ee  f7fffffe          BL       LCD_WriteReg
;;;267    		LCD_WriteReg(0x0051,0x00ef);
0000f2  21ef              MOVS     r1,#0xef
0000f4  2051              MOVS     r0,#0x51
0000f6  f7fffffe          BL       LCD_WriteReg
;;;268    		LCD_WriteReg(0x0052,0x0000);
0000fa  2100              MOVS     r1,#0
0000fc  2052              MOVS     r0,#0x52
0000fe  f7fffffe          BL       LCD_WriteReg
;;;269    		LCD_WriteReg(0x0053,0x013f);
000102  f240113f          MOV      r1,#0x13f
000106  2053              MOVS     r0,#0x53
000108  f7fffffe          BL       LCD_WriteReg
;;;270    		LCD_WriteReg(0x0020,0x0000);
00010c  2100              MOVS     r1,#0
00010e  2020              MOVS     r0,#0x20
000110  f7fffffe          BL       LCD_WriteReg
;;;271    		LCD_WriteReg(0x0021,0x013f);   
000114  f240113f          MOV      r1,#0x13f
000118  2021              MOVS     r0,#0x21
00011a  f7fffffe          BL       LCD_WriteReg
;;;272    		LCD_WriteRAM_Prepare();	
00011e  f7fffffe          BL       LCD_WriteRAM_Prepare
;;;273    
;;;274    		FIFO_OE=0;			  //FIFO  		
000122  2000              MOVS     r0,#0
000124  4941              LDR      r1,|L1.556|
000126  6008              STR      r0,[r1,#0]
;;;275    		VC245_FIFO=0;	 //FIFOֱTFT
000128  493c              LDR      r1,|L1.540|
00012a  6008              STR      r0,[r1,#0]
;;;276    		VC245_7670=1;
00012c  f04f0001          MOV      r0,#1
000130  493b              LDR      r1,|L1.544|
000132  6008              STR      r0,[r1,#0]
;;;277    		WriteControl=1;	 			  
000134  493b              LDR      r1,|L1.548|
000136  6008              STR      r0,[r1,#0]
;;;278    
;;;279    		LCD_RS=1;
000138  493d              LDR      r1,|L1.560|
00013a  6008              STR      r0,[r1,#0]
;;;280    		LCD_RD=1;
00013c  493d              LDR      r1,|L1.564|
00013e  6008              STR      r0,[r1,#0]
;;;281    		LCD_WR=0;
000140  f04f0000          MOV      r0,#0
000144  f1010104          ADD      r1,r1,#4
000148  6008              STR      r0,[r1,#0]
;;;282    		for(i = 0; i < 9600; i ++)	 //ÿ׵TFT2.8ʾߴ320*240
00014a  492e              LDR      r1,|L1.516|
00014c  8008              STRH     r0,[r1,#0]
00014e  e033              B        |L1.440|
                  |L1.336|
;;;283    		 {	
;;;284    		 	for(j = 0; j < 8; j ++)
000150  2000              MOVS     r0,#0
000152  4939              LDR      r1,|L1.568|
000154  8008              STRH     r0,[r1,#0]
000156  e026              B        |L1.422|
                  |L1.344|
;;;285    			{										
;;;286    				FIFO_RCK=0;							
000158  2000              MOVS     r0,#0
00015a  492f              LDR      r1,|L1.536|
00015c  6008              STR      r0,[r1,#0]
;;;287    				FIFO_RCK=1;	
00015e  f04f0001          MOV      r0,#1
000162  4927              LDR      r1,|L1.512|
000164  f8c10188          STR      r0,[r1,#0x188]
;;;288    				LCD_WR=0;	 				
000168  f04f0000          MOV      r0,#0
00016c  4933              LDR      r1,|L1.572|
00016e  6008              STR      r0,[r1,#0]
;;;289    				LCD_WR=1;			
000170  f04f0001          MOV      r0,#1
000174  6008              STR      r0,[r1,#0]
;;;290    				FIFO_RCK=0;						
000176  f04f0000          MOV      r0,#0
00017a  4927              LDR      r1,|L1.536|
00017c  6008              STR      r0,[r1,#0]
;;;291    				FIFO_RCK=1;		
00017e  e000              B        |L1.386|
                  |L1.384|
000180  e038              B        |L1.500|
                  |L1.386|
000182  f04f0001          MOV      r0,#1
000186  6008              STR      r0,[r1,#0]
;;;292    				LCD_WR=0;				
000188  f04f0000          MOV      r0,#0
00018c  492b              LDR      r1,|L1.572|
00018e  6008              STR      r0,[r1,#0]
;;;293    				LCD_WR=1;			
000190  f04f0001          MOV      r0,#1
000194  492a              LDR      r1,|L1.576|
000196  f8c1019c          STR      r0,[r1,#0x19c]
00019a  4827              LDR      r0,|L1.568|
00019c  8800              LDRH     r0,[r0,#0]            ;284  ; j
00019e  f1000001          ADD      r0,r0,#1              ;284
0001a2  4925              LDR      r1,|L1.568|
0001a4  8008              STRH     r0,[r1,#0]            ;284
                  |L1.422|
0001a6  4824              LDR      r0,|L1.568|
0001a8  8800              LDRH     r0,[r0,#0]            ;284  ; j
0001aa  2808              CMP      r0,#8                 ;284
0001ac  dbd4              BLT      |L1.344|
0001ae  4815              LDR      r0,|L1.516|
0001b0  8800              LDRH     r0,[r0,#0]            ;282  ; i
0001b2  1c40              ADDS     r0,r0,#1              ;282
0001b4  4913              LDR      r1,|L1.516|
0001b6  8008              STRH     r0,[r1,#0]            ;282
                  |L1.440|
0001b8  4812              LDR      r0,|L1.516|
0001ba  8800              LDRH     r0,[r0,#0]            ;282  ; i
0001bc  f5b05f16          CMP      r0,#0x2580            ;282
0001c0  dbc6              BLT      |L1.336|
;;;294    											   	
;;;295    			}
;;;296    		}
;;;297    		LCD_CS=1;
0001c2  2001              MOVS     r0,#1
0001c4  4918              LDR      r1,|L1.552|
0001c6  6008              STR      r0,[r1,#0]
;;;298    		FIFO_OE=1;		 	  //ֹFIFO
0001c8  490d              LDR      r1,|L1.512|
0001ca  f8c10198          STR      r0,[r1,#0x198]
;;;299    		Vsync_Flag=0;	   
0001ce  f04f0000          MOV      r0,#0
0001d2  4909              LDR      r1,|L1.504|
0001d4  7008              STRB     r0,[r1,#0]
;;;300    		EXTI->IMR|=(1<<4);	  //ⲿжϣԱ֡ͼ
0001d6  480d              LDR      r0,|L1.524|
0001d8  f8d00400          LDR      r0,[r0,#0x400]
0001dc  f0400010          ORR      r0,r0,#0x10
0001e0  490a              LDR      r1,|L1.524|
0001e2  f8c10400          STR      r0,[r1,#0x400]
;;;301    		EXTI->EMR|=(1<<4);
0001e6  4608              MOV      r0,r1
0001e8  f8d00404          LDR      r0,[r0,#0x404]
0001ec  f0400010          ORR      r0,r0,#0x10
0001f0  f8c10404          STR      r0,[r1,#0x404]
                  |L1.500|
;;;302    	} 		
;;;303    		
;;;304    }
0001f4  bd10              POP      {r4,pc}
;;;305    
                          ENDP

0001f6  0000              DCW      0x0000
                  |L1.504|
                          DCD      Vsync_Flag
                  |L1.508|
                          DCD      0x42218194
                  |L1.512|
                          DCD      0x42218000
                  |L1.516|
                          DCD      i
                  |L1.520|
                          DCD      0x42218184
                  |L1.524|
                          DCD      0x40010000
                  |L1.528|
                          DCD      0x40010404
                  |L1.532|
                          DCD      0x4221819c
                  |L1.536|
                          DCD      0x42218188
                  |L1.540|
                          DCD      0x42218180
                  |L1.544|
                          DCD      0x422201a8
                  |L1.548|
                          DCD      0x422201b4
                  |L1.552|
                          DCD      0x422201a4
                  |L1.556|
                          DCD      0x42218198
                  |L1.560|
                          DCD      0x422201a0
                  |L1.564|
                          DCD      0x42220198
                  |L1.568|
                          DCD      j
                  |L1.572|
                          DCD      0x4222019c
                  |L1.576|
                          DCD      0x42220000

                          AREA ||.data||, DATA, ALIGN=1

                  Vsync_Flag
000000  00                DCB      0x00
                  KEY
000001  00                DCB      0x00
                  i
000002  0000              DCB      0x00,0x00
                  j
000004  0000              DCB      0x00,0x00
                  ||t1||
000006  0000              DCB      0x00,0x00
                  ||t2||
000008  0000              DCB      0x00,0x00
