The Memory project is a demo program for the Keil MCB2140
Board using the NXP LPC2148 Microcontroller. 
It demonstrates an USB Memory based on USB Mass Storage Class.

LEDs are used to display the following:
  - P1.16: LED_RD is on when USB Device is performing Read access
  - P1.17: LED_WR is on when USB Device is performing Write access
  - P1.22: LED_CFG is on when USB Device is configured
  - P1.23: LED_SUSP is on when USB Device is suspended

The USB Memory is automatically recognized by the host PC
running Windows which will load a generic Mass Storage driver.

The Memory program is available for the following targets:
  MCB2140 Board: configured for on-chip Flash ROM
                 (used for production or target debugging)

This example is modified to function as a USB secondary bootloader. The USB secondary 
bootloader operates in two modes. The operating mode is selected by the the P0.15 
pin (except CRP3 mode).

1) Execute: User applcation programmed in the internal flash memory is executed if present.
   First sector in the user application space is used to detect the presence of a user 
   application. If this sector is not blank then a user application is present. If it is 
   blank then the update mode is activated. This mode is forced by tying the P0.15 pin high.

2) Update: The user application programmed in the internal flash memory is updated via the USB.
   This mode is selected by tying the P0.15 pin low.

In update mode the USB bootloader shows up as a USB mass storage device when plugged 
in a PC usb port. The entire user flash contents are mapped to a file named firmware.bin.
To update the user application, the file "firmware.bin" should be deleted. Then a binary 
file containing the new firmware image should be copied to the mass storage device. The 
user flash is then updated with the new firmware image.

Code Read Protection

The USB secondary bootloader can be configured to enable the code read protection feature of
the LPC214x microcontroller. The volume label on the mass storage device indicates the Code 
Read Protection status.

CRP Status         |          Volume Label
-------------------------------------------
No CRP             |          "CRP DISABLD"
-------------------------------------------
CRP1               |          "CRP1 ENABLD"
-------------------------------------------
CRP2               |          "CRP2 ENABLD"
-------------------------------------------
CRP3               |          "CRP3 ENABLD"
-------------------------------------------

NO CRP
------
The user flash can be read or written. 

CRP1
----
The user flash content can not be read but can be updated. The flash memory sectors are updated 
depending on the new firmware image.

CRP2
----
The user flash content can not be read but can be updated. The entire user flash memory is erased
before writing the new firmware image.

CRP3
----
The user flash content can not be read or updated. The USB bootloader ignores the P0.15 pin and
always executes the user application if present. If user application is not present then "Update"
mode is entered.

The user application needs to be modified to execute from the address 0x8000. The first two sectors are 
occupied by the USB secondary bootloader. "User Code Sample Blinky" folder contains an example linked to 
execute from the address 0x8000.

Interrupt handling / Setup code
-------------------------------
The user code needs to be modifed to use the interrupt vector table in RAM since flash vector table is
occupied by the USB bootloader. If the user code only uses the IRQ interrupts then flash vector table
may be used. Please refer to starup.s file for vector setup and intialization.

Configuring the USB Secondary Bootloader
----------------------------------------
sbl_config.h file contains the following configuration options.

USER_START_SECTOR This macro defines the start sector used by the user application. Default 2.

MAX_USER_SECTOR This macro defines the last sector of the user flash. Default 26. This value 
needs to be changed as per the internal flash memory available in the device.

CRP This macro selects the CRP level. Default NOCRP

ISP_ENTRY_GPIO_REG This macro defines the address of the GPIO register used for "Update" mode entry.
                   Default Port 0.

ISP_ENTRY_PIN This macro defines the port pin used for "Update" mode entry. check_isp_entry_pin() 
function can be modified to implement a different entry method.

CCLK This macro defines the system clock for the IAP functions.	Default 60,000 KHz.