sdram_ov7670_vga Project Status (06/02/2015 - 14:21:51)
Project File: sd_sdram_vga.xise Parser Errors: No Errors
Module Name: sdram_ov7670_vga Implementation State: Programming File Not Generated
Target Device: xc6slx9-2ftg256
  • Errors:
 
Product Version:ISE 14.7
  • Warnings:
 
Design Goal: Balanced
  • Routing Results:
 
Design Strategy: Xilinx Default (unlocked)
  • Timing Constraints:
 
Environment:  
  • Final Timing Score:
  
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis Report     
Translation Report     
Map Report     
Place and Route Report     
CPLD Fitter Report (Text)     
Power Report     
Post-PAR Static Timing Report     
Bitgen Report     
 
Secondary Reports [-]
Report NameStatusGenerated
WebTalk ReportCurrent周二 六月 2 14:21:43 2015
WebTalk Log FileCurrent周二 六月 2 14:21:51 2015

Date Generated: 06/02/2015 - 14:21:51