Device Usage Page (usage_statistics_webtalk.html)

This HTML page displays the device usage statistics that will be sent to Xilinx.
 

 
Software Version and Target Device
Product Version: ISE:14.7 (WebPack) - P.20131013 Target Family: Spartan6
OS Platform: NT64 Target Device: xc6slx9
Project ID (random number) 630c1e9a29cd411db9e785d47793390a.3A302CD0460E47F58AC10D5E61229F20.181 Target Package: ftg256
Registration ID __0_0_0 Target Speed: -2
Date Generated 2015-09-09T08:45:35 Tool Flow ISE
 
User Environment
OS Name Microsoft Windows 7 , 64-bit OS Release major release (build 7600)
CPU Name Intel(R) Core(TM) i5-4590 CPU @ 3.30GHz CPU Speed 3300 MHz
OS Name Microsoft Windows 7 , 64-bit OS Release major release (build 7600)
CPU Name Intel(R) Core(TM) i5-4590 CPU @ 3.30GHz CPU Speed 3300 MHz
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
Accumulators=1
  • 22-bit up accumulator=1
Adders/Subtractors=30
  • 10-bit adder=1
  • 11-bit subtractor=2
  • 16-bit adder=1
  • 2-bit adder=1
  • 22-bit adder=2
  • 4-bit adder=10
  • 5-bit adder=2
  • 6-bit adder=3
  • 6-bit subtractor=1
  • 7-bit adder=6
  • 8-bit adder=1
Comparators=37
  • 10-bit comparator greater=3
  • 10-bit comparator lessequal=1
  • 11-bit comparator greater=8
  • 11-bit comparator lessequal=3
  • 12-bit comparator lessequal=1
  • 15-bit comparator greater=1
  • 22-bit comparator greater=2
  • 22-bit comparator lessequal=2
  • 32-bit comparator lessequal=1
  • 4-bit comparator greater=2
  • 4-bit comparator lessequal=5
  • 6-bit comparator greater=2
  • 8-bit comparator equal=1
  • 9-bit comparator greater=3
  • 9-bit comparator lessequal=2
Counters=21
  • 10-bit up counter=3
  • 11-bit up counter=3
  • 12-bit up counter=1
  • 15-bit up counter=1
  • 16-bit up counter=5
  • 20-bit up counter=1
  • 23-bit up counter=1
  • 28-bit up counter=1
  • 32-bit up counter=2
  • 4-bit up counter=1
  • 9-bit up counter=2
FSMs=5 Multiplexers=294
  • 1-bit 2-to-1 multiplexer=145
  • 1-bit 8-to-1 multiplexer=2
  • 10-bit 2-to-1 multiplexer=5
  • 11-bit 2-to-1 multiplexer=2
  • 12-bit 2-to-1 multiplexer=14
  • 16-bit 2-to-1 multiplexer=9
  • 2-bit 2-to-1 multiplexer=18
  • 22-bit 2-to-1 multiplexer=6
  • 4-bit 2-to-1 multiplexer=17
  • 48-bit 2-to-1 multiplexer=7
  • 5-bit 2-to-1 multiplexer=24
  • 6-bit 2-to-1 multiplexer=11
  • 8-bit 2-to-1 multiplexer=34
Registers=751
  • Flip-Flops=751
Xors=8
  • 1-bit xor2=8
MiscellaneousStatistics
  • AGG_BONDED_IO=91
  • AGG_IO=91
  • AGG_LOCED_IO=91
  • AGG_SLICE=502
  • NUM_BONDED_IOB=91
  • NUM_BSFULL=908
  • NUM_BSLUTONLY=579
  • NUM_BSREGONLY=169
  • NUM_BSUSED=1656
  • NUM_BUFG=7
  • NUM_BUFIO2=1
  • NUM_BUFIO2FB=1
  • NUM_DCM=1
  • NUM_IOB_FF=1
  • NUM_LOCED_IOB=91
  • NUM_LOGIC_O5ANDO6=342
  • NUM_LOGIC_O5ONLY=262
  • NUM_LOGIC_O6ONLY=833
  • NUM_LUT_RT_DRIVES_CARRY4=19
  • NUM_LUT_RT_DRIVES_FLOP=29
  • NUM_LUT_RT_EXO5=29
  • NUM_LUT_RT_EXO6=19
  • NUM_LUT_RT_O5=13
  • NUM_LUT_RT_O6=262
  • NUM_OLOGIC2=1
  • NUM_RAMB16BWER=1
  • NUM_RAMB8BWER=1
  • NUM_SLICEL=141
  • NUM_SLICEM=2
  • NUM_SLICEX=359
  • NUM_SLICE_CARRY4=132
  • NUM_SLICE_CONTROLSET=96
  • NUM_SLICE_CYINIT=2138
  • NUM_SLICE_F7MUX=9
  • NUM_SLICE_FF=1256
  • NUM_SLICE_UNUSEDCTRL=141
  • NUM_SRL_O6ONLY=2
  • NUM_UNUSABLE_FF_BELS=350
  • Xilinx Core fifo_generator_v9_3, Xilinx CORE Generator 14.7=2
NetStatistics
  • NumNets_Active=2124
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_BOUNCEACROSS=44
  • NumNodesOfType_Active_BOUNCEIN=229
  • NumNodesOfType_Active_BUFGOUT=7
  • NumNodesOfType_Active_BUFHINP2OUT=26
  • NumNodesOfType_Active_BUFIOINP=2
  • NumNodesOfType_Active_CLKPIN=363
  • NumNodesOfType_Active_CLKPINFEED=54
  • NumNodesOfType_Active_CNTRLPIN=451
  • NumNodesOfType_Active_DOUBLE=1998
  • NumNodesOfType_Active_GENERIC=149
  • NumNodesOfType_Active_GLOBAL=169
  • NumNodesOfType_Active_INPUT=188
  • NumNodesOfType_Active_IOBIN2OUT=119
  • NumNodesOfType_Active_IOBOUTPUT=120
  • NumNodesOfType_Active_LUTINPUT=5663
  • NumNodesOfType_Active_OUTBOUND=1993
  • NumNodesOfType_Active_OUTPUT=2050
  • NumNodesOfType_Active_PADINPUT=96
  • NumNodesOfType_Active_PADOUTPUT=24
  • NumNodesOfType_Active_PINBOUNCE=1119
  • NumNodesOfType_Active_PINFEED=6465
  • NumNodesOfType_Active_PINFEED1=1
  • NumNodesOfType_Active_PINFEED2=3
  • NumNodesOfType_Active_QUAD=997
  • NumNodesOfType_Active_REGINPUT=250
  • NumNodesOfType_Active_SINGLE=3108
  • NumNodesOfType_Gnd_BOUNCEIN=50
  • NumNodesOfType_Gnd_CLKPIN=1
  • NumNodesOfType_Gnd_CNTRLPIN=3
  • NumNodesOfType_Gnd_DOUBLE=2
  • NumNodesOfType_Gnd_GENERIC=3
  • NumNodesOfType_Gnd_HGNDOUT=30
  • NumNodesOfType_Gnd_INPUT=104
  • NumNodesOfType_Gnd_IOBIN2OUT=3
  • NumNodesOfType_Gnd_IOBINPUT=1
  • NumNodesOfType_Gnd_IOBOUTPUT=3
  • NumNodesOfType_Gnd_LUTINPUT=2
  • NumNodesOfType_Gnd_OUTBOUND=8
  • NumNodesOfType_Gnd_OUTPUT=10
  • NumNodesOfType_Gnd_PADINPUT=3
  • NumNodesOfType_Gnd_PINBOUNCE=93
  • NumNodesOfType_Gnd_PINFEED=104
  • NumNodesOfType_Gnd_REGINPUT=65
  • NumNodesOfType_Gnd_SINGLE=7
  • NumNodesOfType_Vcc_CNTRLPIN=3
  • NumNodesOfType_Vcc_GENERIC=1
  • NumNodesOfType_Vcc_HVCCOUT=205
  • NumNodesOfType_Vcc_IOBIN2OUT=2
  • NumNodesOfType_Vcc_IOBOUTPUT=1
  • NumNodesOfType_Vcc_KVCCOUT=5
  • NumNodesOfType_Vcc_LUTINPUT=627
  • NumNodesOfType_Vcc_PADINPUT=1
  • NumNodesOfType_Vcc_PINBOUNCE=4
  • NumNodesOfType_Vcc_PINFEED=630
  • NumNodesOfType_Vcc_REGINPUT=2
SiteStatistics
  • BUFG-BUFGMUX=7
  • IOB-IOBM=49
  • IOB-IOBS=42
  • SLICEL-SLICEM=78
  • SLICEX-SLICEL=80
  • SLICEX-SLICEM=63
SiteSummary
  • BUFG=7
  • BUFG_BUFG=7
  • BUFIO2=1
  • BUFIO2FB=1
  • BUFIO2FB_BUFIO2FB=1
  • BUFIO2_BUFIO2=1
  • CARRY4=132
  • DCM=1
  • DCM_DCM=1
  • FF_SR=196
  • HARD0=18
  • HARD1=16
  • INVERTER=1
  • IOB=91
  • IOB_IMUX=25
  • IOB_INBUF=25
  • IOB_OUTBUF=83
  • LUT5=646
  • LUT6=1456
  • LUT_OR_MEM6=2
  • OLOGIC2=1
  • OLOGIC2_OUTFF=1
  • PAD=91
  • RAMB16BWER=1
  • RAMB16BWER_RAMB16BWER=1
  • RAMB8BWER=1
  • RAMB8BWER_RAMB8BWER=1
  • REG_SR=1060
  • SELMUX2_1=9
  • SLICEL=141
  • SLICEM=2
  • SLICEX=359
 
Configuration Data
BUFIO2FB_BUFIO2FB
  • DIVIDE_BYPASS=[TRUE:1]
  • INVERT_INPUTS=[FALSE:1]
BUFIO2_BUFIO2
  • DIVIDE=[1:1]
  • DIVIDE_BYPASS=[TRUE:1]
  • I_INVERT=[FALSE:1]
DCM
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC:1] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:0]
DCM_DCM
  • CLKDV_DIVIDE=[2.0:1]
  • CLKIN_DIVIDE_BY_2=[FALSE:1]
  • CLKOUT_PHASE_SHIFT=[NONE:1]
  • CLK_FEEDBACK=[2X:1]
  • DESKEW_ADJUST=[5:1]
  • DFS_FREQUENCY_MODE=[LOW:1]
  • DLL_FREQUENCY_MODE=[LOW:1]
  • DSS_MODE=[NONE:1]
  • DUTY_CYCLE_CORRECTION=[TRUE:1]
  • PSCLK=[PSCLK_INV:0] [PSCLK:1]
  • PSEN=[PSEN_INV:0] [PSEN:1]
  • PSINCDEC=[PSINCDEC:1] [PSINCDEC_INV:0]
  • RST=[RST:1] [RST_INV:0]
  • STARTUP_WAIT=[FALSE:1]
  • VERY_HIGH_FREQUENCY=[FALSE:1]
FF_SR
  • CK=[CK:193] [CK_INV:3]
  • SRINIT=[SRINIT0:188] [SRINIT1:8]
  • SYNC_ATTR=[ASYNC:183] [SYNC:13]
IOB_OUTBUF
  • DRIVEATTRBOX=[12:83]
  • SLEW=[SLOW:83]
  • SUSPEND=[3STATE:83]
LUT_OR_MEM6
  • CLK=[CLK:2] [CLK_INV:0]
  • LUT_OR_MEM=[RAM:2]
  • RAMMODE=[SRL16:1] [SRL32:1]
OLOGIC2
  • CLK0=[CLK0_INV:0] [CLK0:1]
  • CLK1=[CLK1:0] [CLK1_INV:1]
OLOGIC2_OUTFF
  • CK0=[CK0_INV:0] [CK0:1]
  • CK1=[CK1_INV:1] [CK1:0]
  • DDR_ALIGNMENT=[NONE:1]
  • OUTFFTYPE=[DDR:1]
  • SRINIT_OQ=[0:1]
  • SRTYPE_OQ=[SYNC:1]
RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:1]
  • CLKB=[CLKB_INV:0] [CLKB:1]
  • ENA=[ENA_INV:0] [ENA:1]
  • ENB=[ENB_INV:0] [ENB:1]
  • REGCEA=[REGCEA_INV:0] [REGCEA:1]
  • REGCEB=[REGCEB_INV:0] [REGCEB:1]
  • RSTA=[RSTA:1] [RSTA_INV:0]
  • RSTB=[RSTB:1] [RSTB_INV:0]
  • WEA0=[WEA0:1] [WEA0_INV:0]
  • WEA1=[WEA1:1] [WEA1_INV:0]
  • WEA2=[WEA2:1] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:1]
  • WEB0=[WEB0:1] [WEB0_INV:0]
  • WEB1=[WEB1:1] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:1]
  • WEB3=[WEB3:1] [WEB3_INV:0]
RAMB16BWER_RAMB16BWER
  • CLKA=[CLKA_INV:0] [CLKA:1]
  • CLKB=[CLKB_INV:0] [CLKB:1]
  • DATA_WIDTH_A=[18:1]
  • DATA_WIDTH_B=[18:1]
  • DOA_REG=[0:1]
  • DOB_REG=[0:1]
  • ENA=[ENA_INV:0] [ENA:1]
  • ENB=[ENB_INV:0] [ENB:1]
  • EN_RSTRAM_A=[FALSE:1]
  • EN_RSTRAM_B=[TRUE:1]
  • RAM_MODE=[TDP:1]
  • REGCEA=[REGCEA_INV:0] [REGCEA:1]
  • REGCEB=[REGCEB_INV:0] [REGCEB:1]
  • RSTA=[RSTA:1] [RSTA_INV:0]
  • RSTB=[RSTB:1] [RSTB_INV:0]
  • RSTTYPE=[SYNC:1]
  • RST_PRIORITY_A=[CE:1]
  • RST_PRIORITY_B=[CE:1]
  • WEA0=[WEA0:1] [WEA0_INV:0]
  • WEA1=[WEA1:1] [WEA1_INV:0]
  • WEA2=[WEA2:1] [WEA2_INV:0]
  • WEA3=[WEA3_INV:0] [WEA3:1]
  • WEB0=[WEB0:1] [WEB0_INV:0]
  • WEB1=[WEB1:1] [WEB1_INV:0]
  • WEB2=[WEB2_INV:0] [WEB2:1]
  • WEB3=[WEB3:1] [WEB3_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:1]
  • WRITE_MODE_B=[WRITE_FIRST:1]
RAMB8BWER
  • CLKAWRCLK=[CLKAWRCLK:1] [CLKAWRCLK_INV:0]
  • CLKBRDCLK=[CLKBRDCLK_INV:0] [CLKBRDCLK:1]
  • ENAWREN=[ENAWREN:1] [ENAWREN_INV:0]
  • ENBRDEN=[ENBRDEN_INV:0] [ENBRDEN:1]
  • REGCEA=[REGCEA_INV:0] [REGCEA:1]
  • REGCEBREGCE=[REGCEBREGCE_INV:0] [REGCEBREGCE:1]
  • RSTA=[RSTA:1] [RSTA_INV:0]
  • RSTBRST=[RSTBRST:1] [RSTBRST_INV:0]
  • WEAWEL0=[WEAWEL0:1] [WEAWEL0_INV:0]
  • WEAWEL1=[WEAWEL1_INV:0] [WEAWEL1:1]
  • WEBWEU0=[WEBWEU0:1] [WEBWEU0_INV:0]
  • WEBWEU1=[WEBWEU1:1] [WEBWEU1_INV:0]
RAMB8BWER_RAMB8BWER
  • CLKAWRCLK=[CLKAWRCLK:1] [CLKAWRCLK_INV:0]
  • CLKBRDCLK=[CLKBRDCLK_INV:0] [CLKBRDCLK:1]
  • DATA_WIDTH_A=[18:1]
  • DATA_WIDTH_B=[18:1]
  • DOA_REG=[0:1]
  • DOB_REG=[0:1]
  • ENAWREN=[ENAWREN:1] [ENAWREN_INV:0]
  • ENBRDEN=[ENBRDEN_INV:0] [ENBRDEN:1]
  • EN_RSTRAM_A=[TRUE:1]
  • EN_RSTRAM_B=[TRUE:1]
  • RAM_MODE=[TDP:1]
  • REGCEA=[REGCEA_INV:0] [REGCEA:1]
  • REGCEBREGCE=[REGCEBREGCE_INV:0] [REGCEBREGCE:1]
  • RSTA=[RSTA:1] [RSTA_INV:0]
  • RSTBRST=[RSTBRST:1] [RSTBRST_INV:0]
  • RSTTYPE=[SYNC:1]
  • RST_PRIORITY_A=[CE:1]
  • RST_PRIORITY_B=[CE:1]
  • WEAWEL0=[WEAWEL0:1] [WEAWEL0_INV:0]
  • WEAWEL1=[WEAWEL1_INV:0] [WEAWEL1:1]
  • WEBWEU0=[WEBWEU0:1] [WEBWEU0_INV:0]
  • WEBWEU1=[WEBWEU1:1] [WEBWEU1_INV:0]
  • WRITE_MODE_A=[WRITE_FIRST:1]
  • WRITE_MODE_B=[WRITE_FIRST:1]
REG_SR
  • CK=[CK:835] [CK_INV:225]
  • LATCH_OR_FF=[FF:1060]
  • SRINIT=[SRINIT0:963] [SRINIT1:97]
  • SYNC_ATTR=[ASYNC:952] [SYNC:108]
SLICEL
  • CLK=[CLK:65] [CLK_INV:3]
SLICEM
  • CLK=[CLK:2] [CLK_INV:0]
SLICEX
  • CLK=[CLK:227] [CLK_INV:64]
 
Pin Data
BUFG
  • I0=7
  • O=7
BUFG_BUFG
  • I0=7
  • O=7
BUFIO2
  • DIVCLK=1
  • I=1
BUFIO2FB
  • I=1
  • O=1
BUFIO2FB_BUFIO2FB
  • I=1
  • O=1
BUFIO2_BUFIO2
  • DIVCLK=1
  • I=1
CARRY4
  • CIN=92
  • CO0=9
  • CO3=97
  • CYINIT=40
  • DI0=127
  • DI1=115
  • DI2=109
  • DI3=96
  • O0=98
  • O1=95
  • O2=91
  • O3=86
  • S0=132
  • S1=119
  • S2=115
  • S3=110
DCM
  • CLK0=1
  • CLK2X=1
  • CLKDV=1
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
DCM_DCM
  • CLK0=1
  • CLK2X=1
  • CLKDV=1
  • CLKFB=1
  • CLKFX=1
  • CLKIN=1
  • PSCLK=1
  • PSEN=1
  • PSINCDEC=1
  • RST=1
FF_SR
  • CE=83
  • CK=196
  • D=196
  • Q=196
  • SR=182
HARD0
  • 0=18
HARD1
  • 1=16
INVERTER
  • IN=1
  • OUT=1
IOB
  • I=25
  • O=83
  • PAD=91
  • T=17
IOB_IMUX
  • I=24
  • I_B=1
  • OUT=25
IOB_INBUF
  • OUT=25
  • PAD=25
IOB_OUTBUF
  • IN=83
  • OUT=83
  • TRI=17
LUT5
  • A1=87
  • A2=113
  • A3=218
  • A4=156
  • A5=194
  • O5=646
LUT6
  • A1=400
  • A2=808
  • A3=884
  • A4=1242
  • A5=1277
  • A6=1436
  • O6=1456
LUT_OR_MEM6
  • A1=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • CLK=2
  • DI1=1
  • DI2=1
  • O6=2
  • WE=2
OLOGIC2
  • CLK0=1
  • CLK1=1
  • D1=1
  • D2=1
  • OCE=1
  • OQ=1
  • SR=1
OLOGIC2_OUTFF
  • CE=1
  • CK0=1
  • CK1=1
  • D1=1
  • D2=1
  • Q=1
  • SR=1
PAD
  • PAD=91
RAMB16BWER
  • ADDRA0=1
  • ADDRA1=1
  • ADDRA10=1
  • ADDRA11=1
  • ADDRA12=1
  • ADDRA13=1
  • ADDRA2=1
  • ADDRA3=1
  • ADDRA4=1
  • ADDRA5=1
  • ADDRA6=1
  • ADDRA7=1
  • ADDRA8=1
  • ADDRA9=1
  • ADDRB0=1
  • ADDRB1=1
  • ADDRB10=1
  • ADDRB11=1
  • ADDRB12=1
  • ADDRB13=1
  • ADDRB2=1
  • ADDRB3=1
  • ADDRB4=1
  • ADDRB5=1
  • ADDRB6=1
  • ADDRB7=1
  • ADDRB8=1
  • ADDRB9=1
  • CLKA=1
  • CLKB=1
  • DIA0=1
  • DIA1=1
  • DIA10=1
  • DIA11=1
  • DIA12=1
  • DIA13=1
  • DIA14=1
  • DIA15=1
  • DIA16=1
  • DIA17=1
  • DIA18=1
  • DIA19=1
  • DIA2=1
  • DIA20=1
  • DIA21=1
  • DIA22=1
  • DIA23=1
  • DIA24=1
  • DIA25=1
  • DIA26=1
  • DIA27=1
  • DIA28=1
  • DIA29=1
  • DIA3=1
  • DIA30=1
  • DIA31=1
  • DIA4=1
  • DIA5=1
  • DIA6=1
  • DIA7=1
  • DIA8=1
  • DIA9=1
  • DIB0=1
  • DIB1=1
  • DIB10=1
  • DIB11=1
  • DIB12=1
  • DIB13=1
  • DIB14=1
  • DIB15=1
  • DIB16=1
  • DIB17=1
  • DIB18=1
  • DIB19=1
  • DIB2=1
  • DIB20=1
  • DIB21=1
  • DIB22=1
  • DIB23=1
  • DIB24=1
  • DIB25=1
  • DIB26=1
  • DIB27=1
  • DIB28=1
  • DIB29=1
  • DIB3=1
  • DIB30=1
  • DIB31=1
  • DIB4=1
  • DIB5=1
  • DIB6=1
  • DIB7=1
  • DIB8=1
  • DIB9=1
  • DIPA0=1
  • DIPA1=1
  • DIPA2=1
  • DIPA3=1
  • DIPB0=1
  • DIPB1=1
  • DIPB2=1
  • DIPB3=1
  • DOB0=1
  • DOB1=1
  • DOB10=1
  • DOB11=1
  • DOB12=1
  • DOB13=1
  • DOB14=1
  • DOB15=1
  • DOB2=1
  • DOB3=1
  • DOB4=1
  • DOB5=1
  • DOB6=1
  • DOB7=1
  • DOB8=1
  • DOB9=1
  • ENA=1
  • ENB=1
  • REGCEA=1
  • REGCEB=1
  • RSTA=1
  • RSTB=1
  • WEA0=1
  • WEA1=1
  • WEA2=1
  • WEA3=1
  • WEB0=1
  • WEB1=1
  • WEB2=1
  • WEB3=1
RAMB16BWER_RAMB16BWER
  • ADDRA0=1
  • ADDRA1=1
  • ADDRA10=1
  • ADDRA11=1
  • ADDRA12=1
  • ADDRA13=1
  • ADDRA2=1
  • ADDRA3=1
  • ADDRA4=1
  • ADDRA5=1
  • ADDRA6=1
  • ADDRA7=1
  • ADDRA8=1
  • ADDRA9=1
  • ADDRB0=1
  • ADDRB1=1
  • ADDRB10=1
  • ADDRB11=1
  • ADDRB12=1
  • ADDRB13=1
  • ADDRB2=1
  • ADDRB3=1
  • ADDRB4=1
  • ADDRB5=1
  • ADDRB6=1
  • ADDRB7=1
  • ADDRB8=1
  • ADDRB9=1
  • CLKA=1
  • CLKB=1
  • DIA0=1
  • DIA1=1
  • DIA10=1
  • DIA11=1
  • DIA12=1
  • DIA13=1
  • DIA14=1
  • DIA15=1
  • DIA16=1
  • DIA17=1
  • DIA18=1
  • DIA19=1
  • DIA2=1
  • DIA20=1
  • DIA21=1
  • DIA22=1
  • DIA23=1
  • DIA24=1
  • DIA25=1
  • DIA26=1
  • DIA27=1
  • DIA28=1
  • DIA29=1
  • DIA3=1
  • DIA30=1
  • DIA31=1
  • DIA4=1
  • DIA5=1
  • DIA6=1
  • DIA7=1
  • DIA8=1
  • DIA9=1
  • DIB0=1
  • DIB1=1
  • DIB10=1
  • DIB11=1
  • DIB12=1
  • DIB13=1
  • DIB14=1
  • DIB15=1
  • DIB16=1
  • DIB17=1
  • DIB18=1
  • DIB19=1
  • DIB2=1
  • DIB20=1
  • DIB21=1
  • DIB22=1
  • DIB23=1
  • DIB24=1
  • DIB25=1
  • DIB26=1
  • DIB27=1
  • DIB28=1
  • DIB29=1
  • DIB3=1
  • DIB30=1
  • DIB31=1
  • DIB4=1
  • DIB5=1
  • DIB6=1
  • DIB7=1
  • DIB8=1
  • DIB9=1
  • DIPA0=1
  • DIPA1=1
  • DIPA2=1
  • DIPA3=1
  • DIPB0=1
  • DIPB1=1
  • DIPB2=1
  • DIPB3=1
  • DOB0=1
  • DOB1=1
  • DOB10=1
  • DOB11=1
  • DOB12=1
  • DOB13=1
  • DOB14=1
  • DOB15=1
  • DOB2=1
  • DOB3=1
  • DOB4=1
  • DOB5=1
  • DOB6=1
  • DOB7=1
  • DOB8=1
  • DOB9=1
  • ENA=1
  • ENB=1
  • REGCEA=1
  • REGCEB=1
  • RSTA=1
  • RSTB=1
  • WEA0=1
  • WEA1=1
  • WEA2=1
  • WEA3=1
  • WEB0=1
  • WEB1=1
  • WEB2=1
  • WEB3=1
RAMB8BWER
  • ADDRAWRADDR0=1
  • ADDRAWRADDR1=1
  • ADDRAWRADDR10=1
  • ADDRAWRADDR11=1
  • ADDRAWRADDR12=1
  • ADDRAWRADDR2=1
  • ADDRAWRADDR3=1
  • ADDRAWRADDR4=1
  • ADDRAWRADDR5=1
  • ADDRAWRADDR6=1
  • ADDRAWRADDR7=1
  • ADDRAWRADDR8=1
  • ADDRAWRADDR9=1
  • ADDRBRDADDR0=1
  • ADDRBRDADDR1=1
  • ADDRBRDADDR10=1
  • ADDRBRDADDR11=1
  • ADDRBRDADDR12=1
  • ADDRBRDADDR2=1
  • ADDRBRDADDR3=1
  • ADDRBRDADDR4=1
  • ADDRBRDADDR5=1
  • ADDRBRDADDR6=1
  • ADDRBRDADDR7=1
  • ADDRBRDADDR8=1
  • ADDRBRDADDR9=1
  • CLKAWRCLK=1
  • CLKBRDCLK=1
  • DIADI0=1
  • DIADI1=1
  • DIADI10=1
  • DIADI11=1
  • DIADI12=1
  • DIADI13=1
  • DIADI14=1
  • DIADI15=1
  • DIADI2=1
  • DIADI3=1
  • DIADI4=1
  • DIADI5=1
  • DIADI6=1
  • DIADI7=1
  • DIADI8=1
  • DIADI9=1
  • DIBDI0=1
  • DIBDI1=1
  • DIBDI10=1
  • DIBDI11=1
  • DIBDI12=1
  • DIBDI13=1
  • DIBDI14=1
  • DIBDI15=1
  • DIBDI2=1
  • DIBDI3=1
  • DIBDI4=1
  • DIBDI5=1
  • DIBDI6=1
  • DIBDI7=1
  • DIBDI8=1
  • DIBDI9=1
  • DIPADIP0=1
  • DIPADIP1=1
  • DIPBDIP0=1
  • DIPBDIP1=1
  • DOBDO0=1
  • DOBDO1=1
  • DOBDO10=1
  • DOBDO11=1
  • DOBDO12=1
  • DOBDO13=1
  • DOBDO14=1
  • DOBDO15=1
  • DOBDO2=1
  • DOBDO3=1
  • DOBDO4=1
  • DOBDO5=1
  • DOBDO6=1
  • DOBDO7=1
  • DOBDO8=1
  • DOBDO9=1
  • ENAWREN=1
  • ENBRDEN=1
  • REGCEA=1
  • REGCEBREGCE=1
  • RSTA=1
  • RSTBRST=1
  • WEAWEL0=1
  • WEAWEL1=1
  • WEBWEU0=1
  • WEBWEU1=1
RAMB8BWER_RAMB8BWER
  • ADDRAWRADDR0=1
  • ADDRAWRADDR1=1
  • ADDRAWRADDR10=1
  • ADDRAWRADDR11=1
  • ADDRAWRADDR12=1
  • ADDRAWRADDR2=1
  • ADDRAWRADDR3=1
  • ADDRAWRADDR4=1
  • ADDRAWRADDR5=1
  • ADDRAWRADDR6=1
  • ADDRAWRADDR7=1
  • ADDRAWRADDR8=1
  • ADDRAWRADDR9=1
  • ADDRBRDADDR0=1
  • ADDRBRDADDR1=1
  • ADDRBRDADDR10=1
  • ADDRBRDADDR11=1
  • ADDRBRDADDR12=1
  • ADDRBRDADDR2=1
  • ADDRBRDADDR3=1
  • ADDRBRDADDR4=1
  • ADDRBRDADDR5=1
  • ADDRBRDADDR6=1
  • ADDRBRDADDR7=1
  • ADDRBRDADDR8=1
  • ADDRBRDADDR9=1
  • CLKAWRCLK=1
  • CLKBRDCLK=1
  • DIADI0=1
  • DIADI1=1
  • DIADI10=1
  • DIADI11=1
  • DIADI12=1
  • DIADI13=1
  • DIADI14=1
  • DIADI15=1
  • DIADI2=1
  • DIADI3=1
  • DIADI4=1
  • DIADI5=1
  • DIADI6=1
  • DIADI7=1
  • DIADI8=1
  • DIADI9=1
  • DIBDI0=1
  • DIBDI1=1
  • DIBDI10=1
  • DIBDI11=1
  • DIBDI12=1
  • DIBDI13=1
  • DIBDI14=1
  • DIBDI15=1
  • DIBDI2=1
  • DIBDI3=1
  • DIBDI4=1
  • DIBDI5=1
  • DIBDI6=1
  • DIBDI7=1
  • DIBDI8=1
  • DIBDI9=1
  • DIPADIP0=1
  • DIPADIP1=1
  • DIPBDIP0=1
  • DIPBDIP1=1
  • DOBDO0=1
  • DOBDO1=1
  • DOBDO10=1
  • DOBDO11=1
  • DOBDO12=1
  • DOBDO13=1
  • DOBDO14=1
  • DOBDO15=1
  • DOBDO2=1
  • DOBDO3=1
  • DOBDO4=1
  • DOBDO5=1
  • DOBDO6=1
  • DOBDO7=1
  • DOBDO8=1
  • DOBDO9=1
  • ENAWREN=1
  • ENBRDEN=1
  • REGCEA=1
  • REGCEBREGCE=1
  • RSTA=1
  • RSTBRST=1
  • WEAWEL0=1
  • WEAWEL1=1
  • WEBWEU0=1
  • WEBWEU1=1
REG_SR
  • CE=660
  • CK=1060
  • D=1060
  • Q=1060
  • SR=682
SELMUX2_1
  • 0=9
  • 1=9
  • OUT=9
  • S0=9
SLICEL
  • A=6
  • A1=20
  • A2=36
  • A3=36
  • A4=92
  • A5=100
  • A6=138
  • AMUX=49
  • AQ=64
  • AX=29
  • B=9
  • B1=16
  • B2=28
  • B3=31
  • B4=84
  • B5=90
  • B6=126
  • BMUX=43
  • BQ=61
  • BX=20
  • C1=21
  • C2=33
  • C3=34
  • C4=80
  • C5=86
  • C6=121
  • CE=51
  • CIN=92
  • CLK=68
  • CMUX=46
  • COUT=92
  • CQ=57
  • CX=29
  • D=3
  • D1=23
  • D2=35
  • D3=36
  • D4=81
  • D5=81
  • D6=117
  • DMUX=43
  • DQ=56
  • DX=21
  • SR=56
SLICEM
  • A1=2
  • A2=2
  • A3=2
  • A4=2
  • A5=2
  • A6=2
  • AI=1
  • AQ=2
  • AX=1
  • BQ=2
  • BX=2
  • CE=2
  • CLK=2
  • CQ=2
  • CX=2
  • DQ=2
  • DX=2
SLICEX
  • A=111
  • A1=119
  • A2=204
  • A3=243
  • A4=270
  • A5=273
  • A6=272
  • AMUX=73
  • AQ=229
  • AX=59
  • B=84
  • B1=93
  • B2=175
  • B3=209
  • B4=227
  • B5=235
  • B6=234
  • BMUX=59
  • BQ=210
  • BX=55
  • C=75
  • C1=86
  • C2=174
  • C3=210
  • C4=224
  • C5=227
  • C6=223
  • CE=144
  • CLK=291
  • CMUX=73
  • CQ=202
  • CX=51
  • D=80
  • D1=83
  • D2=155
  • D3=188
  • D4=199
  • D5=207
  • D6=205
  • DMUX=56
  • DQ=173
  • DX=46
  • SR=199
 
Tool Usage
Command Line History
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • xst -intstyle ise -ifn <ise_file>
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
  • ngdbuild -intstyle ise -dd _ngo -sd <dname> -nt timestamp -uc <fname>.ucf -p xc6slx9-ftg256-2 <fname>.ngc <fname>.ngd
  • map -intstyle ise -p xc6slx9-ftg256-2 -w -logic_opt off -ol high -t 1 -xt 0 -register_duplication off -r 4 -global_opt off -mt off -ir off -pr off -lc off -power off -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -w -intstyle ise -ol high -mt off <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -intstyle ise -v 3 -s 2 -n 3 -fastpaths -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf -ucf <fname>.ucf
  • bitgen -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
Program NameRuns StartedRuns FinishedErrorsFatal ErrorsInternal ErrorsExceptionsCore Dumps
Start 0 0 0 0 0 0 0
_compxlibgui 1 1 0 0 0 0 0
_impact 198 153 0 0 0 0 0
bitgen 1217 1214 0 0 0 0 0
bitinit 9 9 0 0 0 0 0
cse_server 82 82 0 0 0 0 0
elfcheck 587 567 0 0 0 0 0
libgen 838 809 0 0 0 0 0
map 1372 1242 0 0 0 0 0
netgen 15 15 0 0 0 0 0
ngc2edif 4 4 0 0 0 0 0
ngcbuild 731 730 0 0 0 0 0
ngdbuild 1470 1465 0 0 0 0 0
obngc 13 13 0 0 0 0 0
par 1241 1241 0 0 0 0 0
platgen 200 161 0 0 0 0 0
psf2Edward 86 86 0 0 0 0 0
trce 1207 1207 0 0 0 0 0
xdsgen 86 86 0 0 0 0 0
xps 133 132 0 0 0 0 0
xst 2906 2896 0 0 0 0 0
 
Help Statistics
Help files
/doc/usenglish/isehelp/ite_c_overview.htm ( 1 ) /doc/usenglish/platform_studio/ps_c_cpw_coprocessor_wizard.htm ( 1 )
/doc/usenglish/platform_studio/ps_p_dbg_sw_mb_enabling_debug_logic_jtag_uart.htm ( 1 ) /doc/usenglish/platform_studio/ps_r_gst_whatsnew.htm ( 1 )
 
Project Statistics
PROP_Enable_Message_Filtering=false PROP_FitterReportFormat=HTML
PROP_LastAppliedGoal=Balanced PROP_LastAppliedStrategy=Xilinx Default (unlocked)
PROP_ManualCompileOrderImp=false PROP_PropSpecInProjFile=Store all values
PROP_Simulator=ISim (VHDL/Verilog) PROP_SynthTopFile=changed
PROP_Top_Level_Module_Type=HDL PROP_UseSmartGuide=false
PROP_UserConstraintEditorPreference=Text Editor PROP_intProjectCreationTimestamp=2015-05-27T21:38:26
PROP_intWbtProjectID=3A302CD0460E47F58AC10D5E61229F20 PROP_intWbtProjectIteration=181
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxBitgCfg_Rate_spartan6=16 PROP_xilxBitgStart_IntDone=true
PROP_AutoTop=true PROP_DevFamily=Spartan6
PROP_DevDevice=xc6slx9 PROP_DevFamilyPMName=spartan6
PROP_DevPackage=ftg256 PROP_Synthesis_Tool=XST (VHDL/Verilog)
PROP_DevSpeed=-2 PROP_PreferredLanguage=Verilog
FILE_COREGEN=3 FILE_UCF=1
FILE_VERILOG=33
 
Core Statistics
Core Type=fifo_generator_v9_3
c_add_ngc_constraint=0 c_application_type_axis=0 c_application_type_rach=0 c_application_type_rdch=0
c_application_type_wach=0 c_application_type_wdch=0 c_application_type_wrch=0 c_axi_addr_width=32
c_axi_aruser_width=1 c_axi_awuser_width=1 c_axi_buser_width=1 c_axi_data_width=64
c_axi_id_width=4 c_axi_ruser_width=1 c_axi_type=0 c_axi_wuser_width=1
c_axis_tdata_width=64 c_axis_tdest_width=4 c_axis_tid_width=8 c_axis_tkeep_width=4
c_axis_tstrb_width=4 c_axis_tuser_width=4 c_axis_type=0 c_common_clock=0
c_count_type=0 c_data_count_width=10 c_default_value=BlankString c_din_width=16
c_din_width_axis=1 c_din_width_rach=32 c_din_width_rdch=64 c_din_width_wach=32
c_din_width_wdch=64 c_din_width_wrch=2 c_dout_rst_val=0 c_dout_width=16
c_enable_rlocs=0 c_enable_rst_sync=1 c_error_injection_type=0 c_error_injection_type_axis=0
c_error_injection_type_rach=0 c_error_injection_type_rdch=0 c_error_injection_type_wach=0 c_error_injection_type_wdch=0
c_error_injection_type_wrch=0 c_family=spartan6 c_full_flags_rst_val=1 c_has_almost_empty=0
c_has_almost_full=0 c_has_axi_aruser=0 c_has_axi_awuser=0 c_has_axi_buser=0
c_has_axi_rd_channel=0 c_has_axi_ruser=0 c_has_axi_wr_channel=0 c_has_axi_wuser=0
c_has_axis_tdata=0 c_has_axis_tdest=0 c_has_axis_tid=0 c_has_axis_tkeep=0
c_has_axis_tlast=0 c_has_axis_tready=1 c_has_axis_tstrb=0 c_has_axis_tuser=0
c_has_backup=0 c_has_data_count=0 c_has_data_counts_axis=0 c_has_data_counts_rach=0
c_has_data_counts_rdch=0 c_has_data_counts_wach=0 c_has_data_counts_wdch=0 c_has_data_counts_wrch=0
c_has_int_clk=0 c_has_master_ce=0 c_has_meminit_file=0 c_has_overflow=0
c_has_prog_flags_axis=0 c_has_prog_flags_rach=0 c_has_prog_flags_rdch=0 c_has_prog_flags_wach=0
c_has_prog_flags_wdch=0 c_has_prog_flags_wrch=0 c_has_rd_data_count=1 c_has_rd_rst=0
c_has_rst=1 c_has_slave_ce=0 c_has_srst=0 c_has_underflow=0
c_has_valid=0 c_has_wr_ack=0 c_has_wr_data_count=1 c_has_wr_rst=0
c_implementation_type=2 c_implementation_type_axis=1 c_implementation_type_rach=1 c_implementation_type_rdch=1
c_implementation_type_wach=1 c_implementation_type_wdch=1 c_implementation_type_wrch=1 c_init_wr_pntr_val=0
c_interface_type=0 c_memory_type=1 c_mif_file_name=BlankString c_msgon_val=1
c_optimization_mode=0 c_overflow_low=0 c_preload_latency=1 c_preload_regs=0
c_prim_fifo_type=1kx18 c_prog_empty_thresh_assert_val=2 c_prog_empty_thresh_assert_val_axis=1022 c_prog_empty_thresh_assert_val_rach=1022
c_prog_empty_thresh_assert_val_rdch=1022 c_prog_empty_thresh_assert_val_wach=1022 c_prog_empty_thresh_assert_val_wdch=1022 c_prog_empty_thresh_assert_val_wrch=1022
c_prog_empty_thresh_negate_val=3 c_prog_empty_type=0 c_prog_empty_type_axis=0 c_prog_empty_type_rach=0
c_prog_empty_type_rdch=0 c_prog_empty_type_wach=0 c_prog_empty_type_wdch=0 c_prog_empty_type_wrch=0
c_prog_full_thresh_assert_val=1021 c_prog_full_thresh_assert_val_axis=1023 c_prog_full_thresh_assert_val_rach=1023 c_prog_full_thresh_assert_val_rdch=1023
c_prog_full_thresh_assert_val_wach=1023 c_prog_full_thresh_assert_val_wdch=1023 c_prog_full_thresh_assert_val_wrch=1023 c_prog_full_thresh_negate_val=1020
c_prog_full_type=0 c_prog_full_type_axis=0 c_prog_full_type_rach=0 c_prog_full_type_rdch=0
c_prog_full_type_wach=0 c_prog_full_type_wdch=0 c_prog_full_type_wrch=0 c_rach_type=0
c_rd_data_count_width=9 c_rd_depth=1024 c_rd_freq=1 c_rd_pntr_width=10
c_rdch_type=0 c_reg_slice_mode_axis=0 c_reg_slice_mode_rach=0 c_reg_slice_mode_rdch=0
c_reg_slice_mode_wach=0 c_reg_slice_mode_wdch=0 c_reg_slice_mode_wrch=0 c_synchronizer_stage=2
c_underflow_low=0 c_use_common_overflow=0 c_use_common_underflow=0 c_use_default_settings=0
c_use_dout_rst=1 c_use_ecc=0 c_use_ecc_axis=0 c_use_ecc_rach=0
c_use_ecc_rdch=0 c_use_ecc_wach=0 c_use_ecc_wdch=0 c_use_ecc_wrch=0
c_use_embedded_reg=0 c_use_fifo16_flags=0 c_use_fwft_data_count=0 c_valid_low=0
c_wach_type=0 c_wdch_type=0 c_wr_ack_low=0 c_wr_data_count_width=9
c_wr_depth=1024 c_wr_depth_axis=1024 c_wr_depth_rach=16 c_wr_depth_rdch=1024
c_wr_depth_wach=16 c_wr_depth_wdch=1024 c_wr_depth_wrch=16 c_wr_freq=1
c_wr_pntr_width=10 c_wr_pntr_width_axis=10 c_wr_pntr_width_rach=4 c_wr_pntr_width_rdch=10
c_wr_pntr_width_wach=4 c_wr_pntr_width_wdch=10 c_wr_pntr_width_wrch=4 c_wr_response_latency=1
c_wrch_type=0
Core Type=clk_wiz_v3_6
clkin1_period=20.0 clkin2_period=20.0 clock_mgr_type=AUTO feedback_source=FDBK_AUTO
feedback_type=SINGLE manual_override=false num_out_clk=5 primtype_sel=DCM_SP
use_clk_valid=false use_dyn_phase_shift=false use_dyn_reconfig=false use_freeze=false
use_inclk_stopped=false use_inclk_switchover=false use_locked=true use_max_i_jitter=false
use_min_o_jitter=false use_phase_alignment=true use_power_down=false use_reset=true
use_status=false
Core Type=fifo_generator_v9_3
c_add_ngc_constraint=0 c_application_type_axis=0 c_application_type_rach=0 c_application_type_rdch=0
c_application_type_wach=0 c_application_type_wdch=0 c_application_type_wrch=0 c_axi_addr_width=32
c_axi_aruser_width=1 c_axi_awuser_width=1 c_axi_buser_width=1 c_axi_data_width=64
c_axi_id_width=4 c_axi_ruser_width=1 c_axi_type=0 c_axi_wuser_width=1
c_axis_tdata_width=64 c_axis_tdest_width=4 c_axis_tid_width=8 c_axis_tkeep_width=4
c_axis_tstrb_width=4 c_axis_tuser_width=4 c_axis_type=0 c_common_clock=0
c_count_type=0 c_data_count_width=9 c_default_value=BlankString c_din_width=16
c_din_width_axis=1 c_din_width_rach=32 c_din_width_rdch=64 c_din_width_wach=32
c_din_width_wdch=64 c_din_width_wrch=2 c_dout_rst_val=0 c_dout_width=16
c_enable_rlocs=0 c_enable_rst_sync=1 c_error_injection_type=0 c_error_injection_type_axis=0
c_error_injection_type_rach=0 c_error_injection_type_rdch=0 c_error_injection_type_wach=0 c_error_injection_type_wdch=0
c_error_injection_type_wrch=0 c_family=spartan6 c_full_flags_rst_val=1 c_has_almost_empty=0
c_has_almost_full=0 c_has_axi_aruser=0 c_has_axi_awuser=0 c_has_axi_buser=0
c_has_axi_rd_channel=0 c_has_axi_ruser=0 c_has_axi_wr_channel=0 c_has_axi_wuser=0
c_has_axis_tdata=0 c_has_axis_tdest=0 c_has_axis_tid=0 c_has_axis_tkeep=0
c_has_axis_tlast=0 c_has_axis_tready=1 c_has_axis_tstrb=0 c_has_axis_tuser=0
c_has_backup=0 c_has_data_count=0 c_has_data_counts_axis=0 c_has_data_counts_rach=0
c_has_data_counts_rdch=0 c_has_data_counts_wach=0 c_has_data_counts_wdch=0 c_has_data_counts_wrch=0
c_has_int_clk=0 c_has_master_ce=0 c_has_meminit_file=0 c_has_overflow=0
c_has_prog_flags_axis=0 c_has_prog_flags_rach=0 c_has_prog_flags_rdch=0 c_has_prog_flags_wach=0
c_has_prog_flags_wdch=0 c_has_prog_flags_wrch=0 c_has_rd_data_count=1 c_has_rd_rst=0
c_has_rst=1 c_has_slave_ce=0 c_has_srst=0 c_has_underflow=0
c_has_valid=0 c_has_wr_ack=0 c_has_wr_data_count=1 c_has_wr_rst=0
c_implementation_type=2 c_implementation_type_axis=1 c_implementation_type_rach=1 c_implementation_type_rdch=1
c_implementation_type_wach=1 c_implementation_type_wdch=1 c_implementation_type_wrch=1 c_init_wr_pntr_val=0
c_interface_type=0 c_memory_type=1 c_mif_file_name=BlankString c_msgon_val=1
c_optimization_mode=0 c_overflow_low=0 c_preload_latency=1 c_preload_regs=0
c_prim_fifo_type=512x36 c_prog_empty_thresh_assert_val=2 c_prog_empty_thresh_assert_val_axis=1022 c_prog_empty_thresh_assert_val_rach=1022
c_prog_empty_thresh_assert_val_rdch=1022 c_prog_empty_thresh_assert_val_wach=1022 c_prog_empty_thresh_assert_val_wdch=1022 c_prog_empty_thresh_assert_val_wrch=1022
c_prog_empty_thresh_negate_val=3 c_prog_empty_type=0 c_prog_empty_type_axis=0 c_prog_empty_type_rach=0
c_prog_empty_type_rdch=0 c_prog_empty_type_wach=0 c_prog_empty_type_wdch=0 c_prog_empty_type_wrch=0
c_prog_full_thresh_assert_val=509 c_prog_full_thresh_assert_val_axis=1023 c_prog_full_thresh_assert_val_rach=1023 c_prog_full_thresh_assert_val_rdch=1023
c_prog_full_thresh_assert_val_wach=1023 c_prog_full_thresh_assert_val_wdch=1023 c_prog_full_thresh_assert_val_wrch=1023 c_prog_full_thresh_negate_val=508
c_prog_full_type=0 c_prog_full_type_axis=0 c_prog_full_type_rach=0 c_prog_full_type_rdch=0
c_prog_full_type_wach=0 c_prog_full_type_wdch=0 c_prog_full_type_wrch=0 c_rach_type=0
c_rd_data_count_width=9 c_rd_depth=512 c_rd_freq=1 c_rd_pntr_width=9
c_rdch_type=0 c_reg_slice_mode_axis=0 c_reg_slice_mode_rach=0 c_reg_slice_mode_rdch=0
c_reg_slice_mode_wach=0 c_reg_slice_mode_wdch=0 c_reg_slice_mode_wrch=0 c_synchronizer_stage=2
c_underflow_low=0 c_use_common_overflow=0 c_use_common_underflow=0 c_use_default_settings=0
c_use_dout_rst=1 c_use_ecc=0 c_use_ecc_axis=0 c_use_ecc_rach=0
c_use_ecc_rdch=0 c_use_ecc_wach=0 c_use_ecc_wdch=0 c_use_ecc_wrch=0
c_use_embedded_reg=0 c_use_fifo16_flags=0 c_use_fwft_data_count=0 c_valid_low=0
c_wach_type=0 c_wdch_type=0 c_wr_ack_low=0 c_wr_data_count_width=9
c_wr_depth=512 c_wr_depth_axis=1024 c_wr_depth_rach=16 c_wr_depth_rdch=1024
c_wr_depth_wach=16 c_wr_depth_wdch=1024 c_wr_depth_wrch=16 c_wr_freq=1
c_wr_pntr_width=9 c_wr_pntr_width_axis=10 c_wr_pntr_width_rach=4 c_wr_pntr_width_rdch=10
c_wr_pntr_width_wach=4 c_wr_pntr_width_wdch=10 c_wr_pntr_width_wrch=4 c_wr_response_latency=1
c_wrch_type=0
 
Unisim Statistics
XST_UNISIM_SUMMARY
XST_NUM_BUFG=1 XST_NUM_IBUFG=1 XST_NUM_ODDR2=1
NGDBUILD_PRE_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=7 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=30 NGDBUILD_NUM_FDC=411
NGDBUILD_NUM_FDCE=309 NGDBUILD_NUM_FDC_1=3 NGDBUILD_NUM_FDE=159 NGDBUILD_NUM_FDE_1=202
NGDBUILD_NUM_FDP=46 NGDBUILD_NUM_FDPE=11 NGDBUILD_NUM_FDP_1=1 NGDBUILD_NUM_FDR=43
NGDBUILD_NUM_FDRE=60 NGDBUILD_NUM_FDR_1=10 NGDBUILD_NUM_FDS=3 NGDBUILD_NUM_FDSE=4
NGDBUILD_NUM_FDS_1=1 NGDBUILD_NUM_FD_1=1 NGDBUILD_NUM_GND=5 NGDBUILD_NUM_IBUF=6
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=38 NGDBUILD_NUM_IOBUF=17 NGDBUILD_NUM_LUT1=280
NGDBUILD_NUM_LUT2=312 NGDBUILD_NUM_LUT3=143 NGDBUILD_NUM_LUT4=164 NGDBUILD_NUM_LUT5=398
NGDBUILD_NUM_LUT6=367 NGDBUILD_NUM_MUXCY=467 NGDBUILD_NUM_MUXF7=9 NGDBUILD_NUM_OBUF=66
NGDBUILD_NUM_ODDR2=1 NGDBUILD_NUM_RAMB16BWER=1 NGDBUILD_NUM_RAMB8BWER=1 NGDBUILD_NUM_SRLC16E=1
NGDBUILD_NUM_SRLC32E=1 NGDBUILD_NUM_VCC=3 NGDBUILD_NUM_XORCY=404
NGDBUILD_POST_UNISIM_SUMMARY
NGDBUILD_NUM_BUFG=7 NGDBUILD_NUM_DCM_SP=1 NGDBUILD_NUM_FD=30 NGDBUILD_NUM_FDC=411
NGDBUILD_NUM_FDCE=309 NGDBUILD_NUM_FDC_1=3 NGDBUILD_NUM_FDE=159 NGDBUILD_NUM_FDE_1=202
NGDBUILD_NUM_FDP=46 NGDBUILD_NUM_FDPE=11 NGDBUILD_NUM_FDP_1=1 NGDBUILD_NUM_FDR=43
NGDBUILD_NUM_FDRE=60 NGDBUILD_NUM_FDR_1=10 NGDBUILD_NUM_FDS=3 NGDBUILD_NUM_FDSE=4
NGDBUILD_NUM_FDS_1=1 NGDBUILD_NUM_FD_1=1 NGDBUILD_NUM_GND=5 NGDBUILD_NUM_IBUF=24
NGDBUILD_NUM_IBUFG=1 NGDBUILD_NUM_INV=38 NGDBUILD_NUM_LUT1=280 NGDBUILD_NUM_LUT2=312
NGDBUILD_NUM_LUT3=143 NGDBUILD_NUM_LUT4=164 NGDBUILD_NUM_LUT5=398 NGDBUILD_NUM_LUT6=367
NGDBUILD_NUM_MUXCY=467 NGDBUILD_NUM_MUXF7=9 NGDBUILD_NUM_OBUF=66 NGDBUILD_NUM_OBUFT=17
NGDBUILD_NUM_ODDR2=1 NGDBUILD_NUM_RAMB16BWER=1 NGDBUILD_NUM_RAMB8BWER=1 NGDBUILD_NUM_SRLC16E=1
NGDBUILD_NUM_SRLC32E=1 NGDBUILD_NUM_TS_TIMESPEC=1 NGDBUILD_NUM_VCC=3 NGDBUILD_NUM_XORCY=404
 
XST Command Line Options
XST_OPTION_SUMMARY
-ifn=<fname>.prj -ofn=<design_top> -ofmt=NGC -p=xc6slx9-2-ftg256
-top=<design_top> -opt_mode=Speed -opt_level=1 -power=NO
-iuc=NO -keep_hierarchy=No -netlist_hierarchy=As_Optimized -rtlview=Yes
-glob_opt=AllClockNets -read_cores=YES -sd=<No customer specific name> -write_timing_constraints=NO
-cross_clock_analysis=NO -bus_delimiter=<> -slice_utilization_ratio=100 -bram_utilization_ratio=100
-dsp_utilization_ratio=100 -reduce_control_sets=Auto -fsm_extract=YES -fsm_encoding=Auto
-safe_implementation=No -fsm_style=LUT -ram_extract=Yes -ram_style=Auto
-rom_extract=Yes -shreg_extract=YES -rom_style=Auto -auto_bram_packing=NO
-resource_sharing=YES -async_to_sync=NO -use_dsp48=Auto -iobuf=YES
-max_fanout=100000 -bufg=16 -register_duplication=YES -register_balancing=No
-optimize_primitives=NO -use_clock_enable=Auto -use_sync_set=Auto -use_sync_reset=Auto
-iob=Auto -equivalent_register_removal=YES -slice_utilization_ratio_maxmargin=5