i2c_eeprom Project Status (09/26/2013 - 10:04:40) | |||
Project File: | i2c_eeprom_app.xise | Parser Errors: | No Errors |
Module Name: | i2c_eeprom_app | Implementation State: | Programming File Not Generated |
Target Device: | xc3s500e-5pq208 |
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Product Version: | ISE 12.3 |
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Design Goal: | Balanced |
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Design Strategy: | Xilinx Default (unlocked) |
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Environment: | System Settings |
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Device Utilization Summary (estimated values) | [-] | |||
Logic Utilization | Used | Available | Utilization | |
Number of Slices | 243 | 4656 | 5% | |
Number of Slice Flip Flops | 256 | 9312 | 2% | |
Number of 4 input LUTs | 443 | 9312 | 4% | |
Number of bonded IOBs | 4 | 158 | 2% | |
Number of GCLKs | 1 | 24 | 4% |
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | 星期四 九月 26 09:57:45 2013 | ||||
Translation Report | Current | 星期四 九月 26 09:57:49 2013 | ||||
Map Report | Out of Date | 星期五 九月 20 23:25:12 2013 | ||||
Place and Route Report | Out of Date | 星期五 九月 20 23:25:30 2013 | ||||
CPLD Fitter Report (Text) | ||||||
Power Report | ||||||
Post-PAR Static Timing Report | Out of Date | 星期五 九月 20 23:25:33 2013 | ||||
Bitgen Report |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Log File | Current | 星期四 九月 26 10:04:39 2013 |