The following waveforms show the behavior of dcfifo megafunction for the chosen set of parameters in design "read_fifo1.v". The design "read_fifo1.v" has a depth of 512 words of 16 bits each. The fifo is in legacy synchronous mode. The data becomes available after 'rdreq' is asserted; 'rdreq' acts as a read request.
The above waveform shows the behavior of the design under normal read and write conditions with aclr .